1. Technical Field
The present invention relates to a semiconductor device.
2. Related Art
Conventionally, an IGBT (Insulated Gate Bipolar Transistor) chip and an MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) chip having an internal parasitic diode have been electrically connected, and an IGBT, an MOSFET, and a diode have been connected in parallel (refer to, for example, Patent Document 1). Also, an RC-IGBT having the IGBT and a FWD (Free Wheeling Diode) has been known (refer to, for example, Patent Document 2).
Further, it has been known that a boundary region is provided between an IGBT region and a FWD region (refer to, for example, Patent Document 3). Also, it has been known that a trench having an insulating body is provided between the IGBT region and the FWD region (refer to, for example, Patent Document 4). Furthermore, it has been known to provide, between an element region and a terminal end, p-type and n-type pillar regions of which the depths become shallow from the element region to the terminal end in a step-by-step manner (refer to, for example, Patent Document 5).